Unix Systems For Modern Architectures -1994- Pdf Link

    UNIX System V Release 4.0 MP (1991) was a disaster. It used a single "master lock" around the entire kernel. On a 4x Intel 486, performance was worse than on a single CPU because of lock contention on the run queue and buffer cache.

    By 1994, the 4GB virtual address space of 32-bit UNIX is a cage. Database servers (Oracle 7, Informix OnLine) want to map 64GB of shared memory for buffer pools. The Alpha AXP (OSF/1), UltraSPARC (Solaris 2.4 preview), and MIPS R8000 (IRIX 6) all offer full 64-bit kernels.

    The next three years will determine whether UNIX becomes the universal OS for tera-scale computing or fragments into proprietary SMP variants (Windows NT is breathing down our necks). As of April 1994, the smart money is on UNIX—but only if the Berkeley and System V traditions can merge into a truly scalable, modern kernel.

    Modern RISC CPUs are clocked at 66-200MHz, while DRAM access times hover at 60-80ns. The performance gap—the "memory wall"—is now two orders of magnitude. Consequently, the UNIX kernel’s data structures (process table, buffer cache, vnode/inode tables) must be arranged for L1/L2 cache locality. unix systems for modern architectures -1994- pdf

    This paper examines how UNIX must be—and is being—re-architected for three pillars of the modern (1994) architecture: , non-uniform memory access (NUMA) , and 64-bit addressability .

    In 1994, UNIX stands at a paradoxical crossroads. Having vanquished proprietary operating systems from VMS to OS/400, it now faces a crisis born of its own success. The architectures UNIX must run on have fundamentally mutated. The simple, single-issue, in-order scalar processors of the 1980s (e.g., Motorola 68030, Intel 80386) are being replaced by superscalar, out-of-order RISC behemoths (Alpha AXP, MIPS R4000, POWER2, SPARC v9) and, increasingly, Symmetric Multiprocessors (SMPs) with 8, 16, or even 64 CPUs.

    The optimal policy in 1994 is : bind a high-bandwidth device (e.g., FDDI or UltraSCSI controller) to a dedicated CPU. That CPU runs the interrupt handler, the device driver's bottom half, and the user process that consumes the data. This "pipeline" design, seen in Sequent's DYNIX/ptx, can achieve 85% linear scaling for network I/O. UNIX System V Release 4

    The traditional BSD scheduler (O(N) priority recalculation every second) is fatal on a 16-CPU system. The 4.4BSD-Lite scheduler, while improved, still requires a global lock on the run queue.

    Senior Systems Analyst, UNIX Research Group Date: April 17, 1994

    UNIX in 1994 is like a 1960s muscle car with a new fuel-injected engine: powerful but dangerously unstable. The transition to fine-grained locking, 64-bit cleanliness, and interrupt affinity is painful. Many vendors will fail (NeXT, Apollo, perhaps even SVR4 itself). The survivors will be those who treat the kernel not as a monolithic program but as a concurrent data structure problem. By 1994, the 4GB virtual address space of

    The traditional UNIX buffer cache—a pool of memory pages used to cache disk blocks—is obsolete on modern architectures for two reasons. First, the virtual memory system can now page directly from the filesystem (using mmap() and clustered pageins). Second, on SMP systems, the buffer cache lock becomes a global bottleneck.

    The original UNIX kernel—a masterpiece of simplicity—assumed a single CPU, a single memory bus, and an I/O subsystem that was slow compared to the CPU. Today, that kernel becomes the bottleneck. The "Big Kernel Lock" (BKL) found in many commercial UNIXes (System V Release 4, early BSD derivatives) is no longer viable. When a 150MHz Alpha processor sits idle waiting for a spinlock held by a 50MHz SuperSPARC, the system's scalability collapses.

    We use unpersonalized cookies to keep our site working and collect statistics for marketing purposes.
    See the Privacy and Cookie Policy here.